Description
The role focuses on designing and verifying custom silicon for Google's TPU and AI/ML hardware, including SRAMs, memories, custom circuits, and ASIC/SoC development. Responsibilities span IP integration, transistor- and gate-level design, test-chip validation, foundry collaboration, and optimization across physical design, power-performance-area, reliability, and manufacturing. The position requires a bachelor's degree in a relevant engineering or computer science field and at least eight years of experience in circuit design, physical design, or technology development, along with SPICE, CMOS, PNR, STA, and scripting experience.
