Silicon Engineering Intern at Google

Seniority in posting: Intern & Apprentice

Compensation

$94,000 – $125,000/yr

Location: Sunnyvale, California · Widener, Arkansas
Type: Internship
Level: intern
Posted: Sep 14, 2026

Description

Google is hiring a Silicon Engineering Intern for its Cloud Chip Innovation Infrastructure team or Platforms & Devices Silicon team. The intern will work on fundamental hardware, software, and algorithm problems involving custom silicon, AI accelerators, Systems-on-a-Chip, mixed-signal and logic integrated circuits, and chip design workflows. Responsibilities and projects are tailored to the intern’s background and may involve architecture and RTL, verification, physical design, circuits, systems, test, CAD, scripting, FPGA prototyping, EDA tools, or AI/ML hardware acceleration. The role is intended for students in their penultimate academic year pursuing a relevant degree, requires participation in the United States, and offers a US salary of $94,000–$125,000 plus a 0% bonus target.

Required Skills

RTL design
Hardware verification
Physical design
Python
FPGA prototyping
EDA tools
AXI protocols

Additional Information

Minimum Education: Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field
Required Previous Experiences: Project or coursework experience in silicon engineering areas such as architecture and RTL, verification and validation, physical design, circuits, systems, test, or CAD
Experience with scripting or programming languages such as Python, Tcl, Perl, or C++
Preferred Qualifications: Currently attending a degree program in the United States and available to work full time for 12 weeks outside of university term, during the penultimate academic year, or after completing the internship
Coursework, lab, or internship experience in computer architecture, digital logic or RTL design, ASIC/SoC design verification, physical design, or embedded firmware
Experience developing automation scripts or CI/CD pipelines for hardware design and verification workflows using Python, Tcl, or Bash
Experience with FPGA prototyping platforms, lab test equipment, or chip tapeout and shuttle programs
Familiarity with industry-standard EDA tools for simulation, synthesis, lint/CDC, or place-and-route
Understanding of AI/ML hardware acceleration, memory hierarchies, or standard on-chip protocols such as AXI, APB, or PCIe