Description
NVIDIA is hiring a Silicon Validation Engineer for its HW ArchDev Methodology team to design system-level validation strategies, build AI-assisted and data-driven validation workflows, profile workloads, deploy automation and telemetry pipelines, and drive silicon bring-up and root-cause debugging. The role requires a BS/MS in EE/CE or equivalent experience, at least four years in silicon bring-up, ASIC validation, or system-level debug, and expertise in PVT, timing, signal integrity, power, and high-speed interfaces. The position is hybrid and offers a base salary of 136,000 USD to 218,500 USD, equity, and benefits.
