Description
Synopsys is hiring a SerDes PHY Validation Engineer to validate high-speed SerDes PHY silicon in an R&D test lab. The role involves testing silicon with oscilloscopes, network analyzers, and signal-integrity tools; debugging analog circuits, boards, firmware, and test setups; running PVT characterization; building custom test boards; programming FPGAs in Verilog; and writing Python or MATLAB automation scripts. The engineer will collaborate with analog designers and product teams to validate PHY IP for automotive, data-center, and consumer SoCs.
