Description
Fractile is hiring a Silicon Verification Engineer to verify RTL releases for ML/AI IC products intended for scale-out data centre applications. The role involves collaborating with modelling, system architecture, and RTL design teams on specification, architecture, testbench development, stimulus, coverage, and tape-out quality; it requires strong software skills, Python or C++, digital hardware knowledge, SystemVerilog RTL debugging, and waveform debugging. The position is based in Bristol or London and offers equity, private medical, dental, vision, pension, holiday, and life or critical illness insurance.
