SoC Design Engineer at ovt

Compensation

$156,853 – $160,000/yr

Location: California
Level: not_specified
Posted: Jun 8, 2026

Description

OMNIVISION is seeking a SoC Design Engineer responsible for digital design and verification of image sensor and SoC systems. The role involves IP design, integration, analysis, and validation, working closely with back-end teams on floorplanning, timing closure, and design-for-test. Key duties include designing and verifying image sensor control and processing functions, executing ASIC implementation tasks, conducting chip bring-up and silicon validation, and participating in FPGA prototyping.

Required Skills

digital design
verification
IP design
integration
analysis
validation
image sensor control
processing functions
high-speed interfaces
USB
MIPI
full-chip integration
floorplanning
timing closure
static timing analysis (STA)
design-for-test (DFT)
ISP data paths
PRD/design specifications
overall SoC architecture
ASIC implementation tasks
RTL coding
simulation
synthesis
formal verification
chip bring-up
silicon validation
debugging
performance tuning
FPGA prototyping
verification environments
models
SystemVerilog
SVA
Python
Perl
hardware/software co-simulation
sensor, analog, algorithm, and application engineers
system design
module-level architecture
micro-architecture design
image tuning
product qualification
architecture, register, interface, and design documentation
Wi-Fi PHY baseband RTL design and verification
Digital signal processing module implementation using Verilog
Module-level verification and full-chip integration support
Design optimization techniques for area, power, and timing
industry-standard digital design and verification tools
Reading schematics and data sheets for software driver development on the SoC

Additional Information

Required Previous Experiences: one year experience in Digital Design
Preferred Qualifications: Wi-Fi PHY baseband RTL design and verification.
Digital signal processing module implementation using Verilog.
Module-level verification and full-chip integration support.
Design optimization techniques for area, power, and timing.
Using industry-standard digital design and verification tools.
Reading schematics and data sheets for software driver development on the SoC.