Soc Design Verification Director at Astera Labs

Astera Labs is seeking a Director of SoC Design Verification to lead verification for next-generation System-on-Chip products. The role owns the end-to-end SoC verification methodology, integrates IP-level verification into system-level environments, guides verification of complex subsystems, mentors engineers, and collaborates with design, architecture, firmware, and validation teams. The position requires a bachelor’s degree in Electrical or Computer Engineering, 20+ years of design verification experience, and expertise in UVM, assertions, coverage analysis, and scalable verification infrastructure.