Description
The SoC Design Verification Engineer will verify Arm-based IP, subsystems, and SoCs, develop scalable verification environments and automation, execute functional, code, toggle, assertion, and coverage closure, debug RTL and system-level issues, and collaborate with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams. The role requires a relevant bachelor's or master's degree, 2–4 years of IP, subsystem, or SoC verification experience, and strong Verilog, SystemVerilog, UVM, and Arm-based SoC knowledge.
