SoC DFT Engineer at Apple

Department: Hardware

Location: Austin, Texas · Cupertino, California · +1
Level: senior
Posted: Apr 10, 2026

Description

The DFT engineer will support the complete design and manufacturing of a high-performance, power-efficient system-on-chip, developing and implementing DFT architecture and infrastructure, generating and analyzing test vectors, collaborating with design and verification teams, supporting silicon bring-up, and running schedules. The role requires a bachelor's degree and at least 10 years of relevant industry experience, with preferred qualifications in DFT standards, Verilog or VHDL, simulation and waveform debugging, design verification, compressed ATPG, MBIST, JTAG, and STA.

Required Skills

DFT architecture
Test vectors
Verilog/VHDL
DFT standards
Design verification
Compressed ATPG
STA constraints
Scripting

Additional Information

Minimum Education: Bachelor's degree
Required Previous Experiences: At least 10 years of relevant industry experience
Preferred Qualifications: Knowledge of DFT industrial standards and practices, including ATPG, JTAG, and MBIST
Experience developing DFT specifications and driving DFT architecture and methods
Knowledge of Verilog or VHDL and experience with simulators and waveform debugging tools
Knowledge of DFT and design tool industry standards
Understanding of design verification methodologies for validating DFT implementation in simulation
Experience debugging compressed ATPG, MBIST, and JTAG/1500 issues
Experience with STA constraints and SDF simulations
Ability to conduct silicon debug experiments and use scripting for ATE data

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