SOC Engineering, Staff Engineer - 18082 at Synopsys

Location: Noida, Uttar Pradesh
Type: Full-time
Level: staff+
Posted: Jun 30, 2026

Description

Synopsys is hiring a DFT Staff Engineer for SoC Engineering in Noida, India. The role owns DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout, covering scan/ATPG, memory and logic BIST, analog/PHY test considerations, testability risk resolution, and reusable methodologies. The engineer will collaborate with customer and internal design teams, support post-silicon debug and failure analysis, and provide technical guidance to peers. The posting requires a bachelor's or master's degree in a relevant engineering field and typically 5+ years of hands-on SoC DFT experience; Synopsys EDA tools and post-silicon debug experience are advantageous. The role is not remote-eligible.

Required Skills

DFT architecture
Scan insertion
ATPG
Memory BIST
Logic BIST
Analog testing
Synopsys EDA tools
Post-silicon debug

Additional Information

Minimum Education: Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or a related field
Required Previous Experiences: 5+ years of hands-on SoC DFT experience with scan/ATPG, memory BIST, logic BIST, and analog test considerations
Experience owning DFT implementation for complex SoCs that have taped out and gone to production
Cross-functional experience resolving testability issues and driving closure under schedule constraints
Post-silicon debug experience and collaboration with test engineering teams
Preferred Qualifications: Strong working knowledge of Synopsys DFT tools, including TetraMAX, DFT Compiler, and BIST Architect
Post-silicon debug experience and collaboration with test engineering teams