Description
The SoC Front End Design Integration Engineer will design, integrate, and verify a system fabric bus into a subsystem, build test benches and test vectors, run verification environments, synthesize the design, and perform Static Timing Analysis. The role requires digital logic design, Verilog/System Verilog RTL, synthesis, STA, and simulation skills, along with strong problem-solving, analytical, and communication abilities. Preferred qualifications include experience with specifications and documentation, hardware verification, and front-end tools and methodologies.
