Description
Infineon is hiring an experienced SoC High-Speed Interface Architect for its Automotive Microcontroller R&D team. The role owns the chip-level integration architecture for high-speed PHYs such as LPDDR, Ethernet PHY, and HSPHY/SerDes, defining placement, power delivery, reference clocks, signal integrity, jitter budgets, and electrical compliance. It serves as the primary interface to PHY IP teams and external vendors, oversees early signal integrity simulation and parasitic analysis, provides architectural sign-off, maintains ISO 26262 documentation, and contributes to datasheet electrical parameters. The position requires a bachelor's or master's degree in electrical engineering or a related field, at least 10 years of semiconductor development experience, and strong knowledge of high-speed interface PHYs and signal integrity.
