Description
NVIDIA is seeking a Networking Architecture Engineer to develop architectures, algorithms, models, and methodologies that improve power consumption across DPU and NIC products. The role leads research into power optimization and modeling, defines power-aware architecture requirements, and collaborates with board, package, physical design, software, ASIC, verification, and platform teams to address power delivery, di/dt, thermal, and signal-integrity challenges. Candidates need a bachelor’s or master’s degree in electrical engineering or a related field, at least five years of ASIC design, uarch, architecture, or performance experience, and strong knowledge of digital design, front-end and back-end practices, power analysis, and characterization.
