Description
Qualcomm is hiring an ASIC Engineer to implement and validate low-power design intent at the SoC level. The role works with frontend RTL, DFT, synthesis, physical design, verification, IP, chipset, software, and post-silicon test teams to develop and validate UPF/CPF power models, power budgets, power analysis, and power-aware implementation flows. Candidates need a bachelor's, master's, or PhD in science, engineering, or a related field plus the stated years of ASIC experience, along with RTL, hardware description languages, power-aware implementation, and scripting skills. The listed pay range is $145,600 to $218,400.
