Skip to main content

Software Engineer — RISC-V Random Test Generator at Qualcomm International Inc., Mexico Branch Office

Department: CPU Engineering

Compensation

$175,600 – $263,400/yr

Setup
On-site
Location
Cupertino, California
Type
Full-time
Level
mid
Posted

Description

Qualcomm is hiring a RISC-V CPU Verification Engineer to develop and tune a Python-based random test generation framework and assembler library for RISC-V CPU design verification. The role involves creating generation objects and instruction encodings, writing test themes, supporting privileged-software stacks, and collaborating with ISS and RTL verification engineers to triage failures and improve coverage. Candidates need 2–5 years of relevant CPU verification, ISS development, or hardware-software co-design experience, strong Python 3 skills, and RISC-V ISA knowledge; the listed pay range is $175,600 to $263,400.

For job seekers

Ready to find a role that actually fits?

Upload your résumé, start a Job Search Thread, and let Metaintro rank real openings against your experience — then guide you from search to offer.

Match

Compare live roles against your current evidence.

Position

Turn proof projects into role-specific applications.

Improve

Use market feedback to keep the skill plan current.

Return to navigation