Description
The role is a mixed-signal IC design engineer for Renesas’ CMSD R&D team in Korea. Responsibilities include understanding transistor- and system-level architecture, ensuring analog block performance across PVT variations, developing silicon-proven IP, collaborating with digital, layout, test, and characterization teams, evaluating IPs, analyzing ATE and CHZ data, supporting root-cause analysis, and modeling circuits for top-level testbenches. The position requires an M.D. or Ph.D. in EE semiconductor design using CMOS, strong analog and mixed-signal design and layout knowledge, semiconductor reliability and failure-analysis experience, and strong English communication.
