Summary from listing
Ericsson is hiring a Senior ASIC IP Designer to define and develop SoC-level IP blocks and subsystems for 5G Advanced projects. The role owns the design process from concept through completion, creates architecture and design specifications, performs digital design and RTL sign-off, collaborates with designers, verifiers, and architects, improves design methodologies, produces documentation, and coaches junior engineers. The position is based in Lund, Sweden, with collaboration with teams in Austin, United States, and requires a master’s or PhD in electronic engineering or equivalent, at least eight years of ASIC design experience, and proficiency in System Verilog and related design tools.
