NXP is seeking an experienced Design for Test (DFT) Engineer to define and implement DFT architectures for complex digital designs, including scan, MBIST, boundary scan, scan insertion, chain stitching, compression, ATPG pattern generation, and fault coverage. The role also involves debugging DFT-related issues, collaborating with RTL, physical design, and STA teams, and supporting pattern validation, gate-level simulation, and silicon bring-up.
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