Description
Micron is hiring a Senior Digital Design Engineer to develop advanced DRAM digital and mixed-signal blocks. The role covers RTL design, implementation, synthesis, timing analysis, power optimization, and design quality across the RTL-to-GDS flow, with collaboration on architecture, verification, and physical design. Candidates need a master’s degree in electrical engineering with 4+ years of experience, or a bachelor’s degree with 5+ years of experience in digital ASIC/RTL design, along with expertise in ASIC front-end flows, Verilog/SystemVerilog, SDC constraints, STA, and low-power design methodologies.
