Description
Intel is hiring a PERC ESD Verification Engineer to develop and maintain ESD/LU rule decks, reliability design-rule methodologies, and verification automation for Intel's advanced process technologies. The role collaborates with design, reliability, CAD, and EDA teams; builds test cases; defines QA requirements; and leads innovation and cross-functional initiatives. Candidates need a master's or PhD in Electrical or Computer Engineering, at least three years of relevant physical-design verification experience, two years of ESD PERC rule-deck development, and two years of scripting experience. The position is based in Hillsboro, Oregon, requires on-site work, and offers an annual salary range of $149,600 to $284,580 USD.
