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Sr Engineer, Advanced Packaging Design Enablement Engineering (APDEE) at Micron

Department: HIG

Setup
On-site
Location
Hyderabad, Telangana
Level
senior
Posted

Description

Micron Technology is hiring a Senior Engineer for its Advanced Packaging Build Enablement Engineering team in Hyderabad, India. The role focuses on High Bandwidth Memory packaging programs, including PWF reticle design, test vehicles, TSV and BEOL design, DRC/LVS/ERC sign-off, DFT structures, electrical simulations, and advanced packaging process design. Candidates need a master's or PhD in electrical or computer engineering, at least five years of die design and physical layout experience, and hands-on experience with HBM, 3D-IC, or advanced packaging programs.

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