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Sr. Engineer, CPU RTL Design at Tenstorrent

Department: RISC V

Compensation

$100,000 – $500,000/yr

Setup
Hybrid
Location
Santa Clara, California · Austin, Texas · +1
Type
Full-time
Level
not_specified
Posted

Description

Tenstorrent is hiring a CPU Design Engineer to define and implement RTL for a high-performance RISC-V CPU. The role involves developing CPU microarchitecture, collaborating with DV, PD, and performance teams, optimizing power, performance, and area, and supporting pre- and post-silicon validation. The position is hybrid and based in Austin, Texas or Santa Clara, California, with compensation ranging from $100,000 to $500,000 including base and variable compensation targets.

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