Description
Applied Materials is hiring a full-time Die-to-Wafer Hybrid Bonding Module Engineer in Santa Clara, California, to develop and scale hybrid bonding technologies for advanced semiconductor packaging, including memory, chiplets, AI accelerators, photonics, and heterogeneous integration. The role covers process development, integration, yield and defect reduction, metrology, reliability, equipment evaluation, and technology transfer, with collaboration across R&D, equipment, manufacturing, and customer teams. Candidates need an M.S. or Ph.D. in a relevant discipline and at least five years of semiconductor process development experience after graduation, plus direct experience in hybrid bonding, wafer bonding, advanced packaging, HBM, Cu interconnects, or chiplet integration.
