Sr. Principal Program Manager, ASIC Design at Astera Labs

Department: Program Management

Language

Compensation

CA$195,000 – CA$240,000/yr

Location: Toronto, Ontario
Type: Full-time
Level: staff+
Posted: Jun 25, 2026

Description

Astera Labs is hiring a Sr. Principal Program Manager, ASIC Design to lead cross-functional execution of advanced ASIC programs from early planning through tapeout. The role owns program plans, milestones, dependencies, risks, dashboards, phase-gate readiness, and executive reporting while coordinating architecture, RTL, verification, emulation, DFT, synthesis, physical design, CAD, IP, product management, engineering leadership, and external partners. It requires a bachelor's or master's degree in a relevant technical field and 10+ years of ASIC/SoC development or silicon program execution experience, including at least 3 years in technical program management, engineering program management, or technical leadership. The salary range is CAD 195,000 to CAD 240,000, with possible discretionary bonus, incentives, and benefits.

Required Skills

ASIC/SoC development
Technical program management
Risk management
EDA flows
IP integration
PDK readiness
Foundry requirements
Stakeholder management

Additional Information

Minimum Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field
Required Previous Experiences: 10+ years of ASIC/SoC development or silicon program execution experience, including 3+ years in technical program management, engineering program management, or technical leadership
Experience managing pre-silicon ASIC development flows through tapeout
Experience with advanced process nodes and high-performance ASIC/SoC development
Experience with pre-silicon validation platforms including simulation, emulation, FPGA prototyping, or hardware/software co-validation
Experience driving complex cross-functional programs with multiple engineering teams, technical dependencies, external vendors, and aggressive schedules
Preferred Qualifications: Strong technical judgment and ability to manage trade-offs across performance, power, area, cost, schedule, quality, and risk
Excellent communication, organizational, leadership, and stakeholder-management skills
Ability to influence without authority across global, cross-functional, and cross-cultural teams
Ability to operate independently in a fast-paced, ambiguous, high-growth environment
Experience with high-speed connectivity, SerDes, PHY, PCIe, CXL, Ethernet, networking, switching, or AI infrastructure silicon
Translation Company Name: Astera Labs

About Astera Labs

Astera Labs

Silicon-based hardware connectivity solutions and software for rack-scale AI.San Jose, CA, United States

Astera Labs builds silicon-based hardware connectivity solutions and software for rack-scale AI, including smart fabric switches, retimers, memory controllers, and signal conditioners. Astera Labs reported second-quarter 2026 revenue of $392.4 million, up 27% quarter over quarter and 104% year over year.

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