SR RTL DESIGN at Micron

Department: DTPG

Setup: On-site
Location: Boise, Idaho
Level: senior
Posted: Jun 3, 2026

Description

Micron Technology is hiring a Senior RTL Engineer to build and develop digital and mixed-signal blocks for advanced DRAM products. The role covers the RTL lifecycle from specification and implementation through signoff, including RTL-to-GDS flows, linting, CDC/RDC, synthesis, UPF, timing quality-of-result, and collaboration with physical design and implementation teams to meet power, performance, and area targets. The position is based in Boise, Idaho and requires a master’s degree in Electrical Engineering with 4+ years of experience or a bachelor’s degree with 5+ years of pre-silicon RTL design experience, along with ASIC design, Verilog/SystemVerilog, and RTL simulation expertise.

Required Skills

RTL design
Verilog/SystemVerilog
Logic synthesis
Static timing analysis
UPF power intent
CDC/RDC analysis
Mixed-signal RTL

Additional Information

Minimum Education: Master’s degree in Electrical Engineering, or Bachelor’s degree with 5+ years of pre-silicon RTL design experience
Required Previous Experiences: 4+ years of experience for the master’s-degree path
5+ years of pre-silicon RTL design experience for the bachelor’s-degree path
Experience developing RTL for complex digital IP from specification through implementation handoff
Hands-on experience with ASIC low-power design methodologies, including UPF-based power intent and CDC/RDC analysis
Strong knowledge of ASIC design flows, including RTL design, logic synthesis, verification, and static timing analysis
Preferred Qualifications: Experience collaborating across architecture, verification, and physical design teams to resolve PPA challenges
Knowledge of CDC, RDC, STA, and low-power techniques in advanced ASIC technology nodes
Experience with complex digital logic and/or mixed-signal-interfacing RTL development
Familiarity with CMOS digital and analog-integrated circuit concepts and their system-level impact
Previous experience with memory or high-performance digital design