Sr Staff Physical Implementation Flow Engineer at Synopsys

Synopsys is hiring a Sr Staff Physical Implementation Flow engineer with 8+ years of experience to work on next-generation physical implementation flows and cutting-edge technology nodes for PCI/CXL/IDE Controller IPs. The role focuses on timing closure, signoff criteria, hierarchical physical design, and full ASIC physical implementation including synthesis, floorplanning, PG grid design, place and route, CTS, STA, and power/signal integrity signoff. The candidate should have strong ASIC design flow knowledge, timing analysis, constraints management, physical-aware synthesis, Formality, PrimePower-based power analysis, clock gating, scripting, and excellent communication skills.