Apple is hiring an ASIC STA Engineer to lead timing closure for full-chip and block-level System-on-Chip designs, develop timing verification and closure methodologies, generate timing constraints, and resolve complex timing issues across deep-sub-micron mobile SoCs. The role requires collaboration with multiple SOC teams and requires a bachelor's degree plus 10 years of experience.
Every query opens live roles, salary samples, and market demand — tap a search to run it instantly.
Unlock powerful job search, personalized recommendations, and deep career insights from comprehensive, market-leading data and live market signals.
For job seekers
Upload your résumé, start a Job Search Thread, and let Metaintro rank real openings against your experience — then guide you from search to offer.
Match
Compare live roles against your current evidence.
Position
Turn proof projects into role-specific applications.
Improve
Use market feedback to keep the skill plan current.
technology industryCupertino, CA
Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.
Customers and case studies
See customers and case studies