Description
eInfochips Inc is hiring a STA Engineer for a day-one onsite role in San Jose, California, at a bill rate of $90 per hour. The role focuses on full-chip SDC development, static timing analysis, clocking diagrams, and bridging RTL design, physical design, and DFT teams to close timing across multiple timing modes. The position also offers the option to perform block-level RTL design or top-level IP integration. Candidates need a bachelor's degree in electrical or computer engineering with 7+ years of ASIC or related experience, or a master's degree with 5+ years of ASIC or related experience, along with extensive STA, SDC, digital design, synthesis, formal verification, and scripting experience.
