Description
Synopsys is hiring a customer-facing physical design engineer to support semiconductor customers with advanced-node ASIC design flows. The role involves debugging placement, CTS, routing, timing closure, and power issues; developing methodology recommendations; running benchmarks and proof-of-concept flows; translating customer needs into product requirements; and presenting technical content to engineering teams and management. The engineer will also travel to customer sites for onsite support, training, and design reviews. The position requires a bachelor's degree in electrical engineering or equivalent with 7+ years of ASIC physical design experience, or a master's degree with 5+ years, along with deep experience in RTL-to-GDS flows, Synopsys backend tools, static timing analysis, and advanced-node design challenges.
