Staff Applications Engineer, HAV Solutions at Synopsys

Setup: Remote
Location: Sunnyvale, California
Level: senior
Posted: Sep 17, 2026

Description

The Hardware-Assisted Verification (HAV) Applications Engineer supports customers deploying Synopsys HAPS and ProtoCompiler for FPGA-based prototyping. The role covers the ASIC-to-FPGA flow, debugging interface IP and hardware bring-up issues, analyzing customer-reported problems, developing partitioning and clock-architecture methodologies, and collaborating with Sales, Customer Success, R&D, and Product Management. Candidates need a bachelor's or master's degree in a relevant engineering or computer science field, 5–8 years of experience in FPGA implementation, ASIC design, ASIC verification, FPGA prototyping, or applications engineering, and hands-on experience with FPGA synthesis, place-and-route, timing closure, RTL, verification, interface IP, and scripting.

Required Skills

FPGA implementation
ASIC design
FPGA prototyping
Xilinx Vivado
Intel Quartus
SystemVerilog
Tcl
Python
ProtoCompiler
HAPS

Additional Information

Minimum Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience
Required Previous Experiences: 5–8 years of experience in FPGA implementation, ASIC design, ASIC verification, FPGA prototyping, or applications engineering
Experience with FPGA synthesis, place-and-route, and timing closure using Xilinx Vivado, Intel Quartus, or similar tools
Working knowledge of SystemVerilog, RTL design, and verification concepts
Hands-on experience with at least one interface IP family, including PCIe, DDR, Ethernet, USB, or AXI
Scripting ability in Tcl, Python, or shell for automation and flow customization
Preferred Qualifications: Experience with Synopsys HAPS, ProtoCompiler, or other FPGA-based prototyping platforms
Translation Company Name: Synopsys