Staff Design Verification Engineer at SiFive

SiFive is hiring a Staff Hardware Engineer in Design Verification to own verification strategy and execution for complex out-of-order processor and cache/memory subsystems. The role covers OOO core and memory verification, UVM testbench architecture, coverage closure, formal and assertion-based verification, complex bug debugging, verification methodology, and mentoring junior engineers. Candidates need a BS/MS/PhD in a relevant field and typically 8+ years of ASIC/SoC/IP design verification experience, with strong System Verilog and UVM expertise and significant OOO CPU or advanced core project experience.