Description
Intel is hiring a Staff Device Modeling Engineer in its Design Technology Platform organization to develop and validate compact transistor models and simulation methodologies for advanced semiconductor process technologies. The role partners with technology and PDK teams, develops FinFET and GAAFET models including layout-dependent and self-heating effects, performs statistical modeling and data analysis with Python, uses commercial circuit simulators and extraction tools, and contributes to RF, EM, benchmarking, and Open Model Interface modeling. The position is hybrid and based in Hillsboro, Oregon, with an additional location in Santa Clara, California.
