Description
Arm is hiring a Staff DFT Engineer to architect, implement, and validate design-for-test techniques for SoCs and subsystems across client, datacenter, automotive, and IoT businesses. The role covers DFT logic insertion, RTL and gate-level simulation, ATPG, timing analysis, scan and BIST implementation, ATE test patterns, and silicon characterization. Candidates need a bachelor’s or master’s degree in a relevant engineering field, at least 10 years of DFT experience, and experience with Verilog, TCL or Perl, and Cadence or Synopsys tools. The position is available in San Jose and Austin and offers a salary range of $198,100 to $268,000 per year.
