Description
Infineon is hiring an Analog Layout Engineer to perform analog circuit block, subsystem, and top-level layout and verification using Cadence Virtuoso-VXL. The role leads or co-leads layout design from floor planning through routing and violation resolution, conducts internal and external design reviews, plans project schedules, distributes tasks, and coaches junior engineers. Candidates need a bachelor’s degree in electronic, microelectronics, or electrical engineering, more than five years of analog layout experience, and hands-on knowledge of analog layout techniques, IR drop and EM analysis, and submicron CMOS technologies.
