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Staff Engineer, IP Dev Layout at Micron

Department: DTPG

Setup
On-site
Location
Hyderabad, Telangana
Level
senior
Posted

Description

Micron Technology is hiring a VLSI Layout Engineer to design and develop analog, mixed-signal, custom digital, and full-chip layouts; perform LVS, DRC, antenna, quality checks, and documentation; deliver block-level layouts; and support project planning, scheduling, and communication with global engineering teams. The role requires 8–15 years of analog/custom layout experience in advanced CMOS processes, expertise in Cadence VLE/VXL and Mentor Graphic Calibre, and knowledge of analog layout fundamentals, layout effects, build constraints, and memory architectures.

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