Description
Qualcomm Canada ULC is hiring a replacement ASIC Physical Design Engineer to lead end-to-end physical design for complex SoC and retimer-class ASICs in advanced technology nodes. The role covers floorplanning, clock tree synthesis, placement and routing, power delivery, timing closure, physical verification, SerDes and mixed-signal integration, IR/EM closure, congestion mitigation, and tapeout execution. Candidates need a bachelor’s degree with 4+ years of ASIC design or related experience, or a master’s degree with 3+ years, along with strong EDA, timing, verification, and large-scale integration expertise. The listed pay range is $129,600 to $179,600.
