Qualcomm International Inc., Mexico Branch Office

Staff IC Packaging Engineer - Mechanical Simulation at Qualcomm International Inc., Mexico Branch Office

Department: Packaging Engineering

Compensation

$160,200 – $240,200/yr

Setup: On-site
Location: San Diego, California
Type: Full-time
Level: senior
Posted: Sep 17, 2026

Description

Qualcomm is hiring an IC Packaging FEA Engineer to support current and future chipsets through mechanical finite-element analysis, warpage and stress analysis, solder-joint reliability prediction, package-assembly simulation, chip-package interaction analysis, and failure prediction. The role develops and maintains ANSYS APDL and Workbench models, establishes benchmarking and test-correlation methodologies, performs material characterization, and collaborates with design, NPI, and chip-package interaction teams. Candidates need a bachelor's, master's, or PhD in a relevant engineering field plus the stated years of experience, with semiconductor packaging and ANSYS experience preferred.

Required Skills

FEA
ANSYS APDL
Workbench
Warpage analysis
Solder reliability
CPI analysis
Material characterization

Additional Information

Minimum Education: Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field
Required Previous Experiences: 4+ years of System/Package Design/Technology Engineering or related work experience
3+ years of ANSYS (APDL/Workbench) experience
4+ years of direct experience in semiconductor and IC microelectronic packaging
Preferred Qualifications: PhD in Mechanical Engineering, Materials Science, Electrical/Microelectronics, or a related engineering field
6+ years of combined experience in finite-element modeling and analysis for IC electronic packages and interconnects
Experience with IC electronic packaging structures, assembly processes, reliability testing, CPI, package-board interaction, and design of experiments
Understanding of IC packaging materials and their thermo-mechanical behaviors
Hands-on FEA experience developing benchmarking models for predictive package modeling
Experience with material characterization and developing test methods for improved FEA model accuracy
Research and publications in FEA predictive modeling, warpage, CPI, and solder lifetime prediction
Experience using internal AI tools to accelerate APDL coding and simulation workflows
Strong analytical, project-execution, communication, and presentation skills
Self-starter with flexible hours for APAC and U.S. collaboration and occasional domestic and international travel