Description
Synopsys is hiring a Staff Interface IP Verification Engineer (Pre-Silicon) to own end-to-end verification of complex interface IP, including PCIe, CXL, DDR, and Ethernet. The role involves architecting scalable UVM-based verification environments, developing constrained-random and coverage-driven testbenches, defining verification strategies, driving coverage closure, debugging RTL and protocol issues, and mentoring verification engineers. Candidates need a bachelor's or master's degree in electrical or computer engineering, at least five years of ASIC or SoC verification experience, and deep expertise in SystemVerilog, UVM, and one or more interface protocols.
