Description
Micron Technology is hiring a memory-design engineer to contribute to the design, layout, optimization, verification, and sign-off of DRAM memory arrays and peripheral and analog circuits. The role uses AI-based tools, agentic workflows, and automation to accelerate schematic optimization, design-space exploration, parasitic analysis, simulation, debug, and verification, while overseeing floor-planning, placement, routing, and circuit-level analysis. Candidates need a master’s degree in electrical or computer engineering, 4–8 years of memory-design experience, CMOS and device-physics knowledge, and SPICE-based simulation and parasitic-extraction experience; DRAM, NAND, semicustom, and AI/ML design-flow experience are preferred.
