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Staff Package Design Engineer - Substrate 封装设计专家(基板方向) at RenesasElectronics

Seniority in posting: senior

Language
Setup
On-site
Location
Suzhou, Jiangsu Province
Type
Full-time
Level
senior
Posted

Description

Renesas is hiring a Power Packaging Engineer to design and qualify power SiP/modules, wafer-level chip-scale packages, flip-chip, multi-chip module LGA, and power-device packaging. The role covers embedded-substrate development, material and process qualification, OSAT/CM process optimization, production controls, reliability qualification, packaging-roadmap execution, and resolution of process and customer issues. Candidates need a doctorate, master’s, or bachelor’s degree in a relevant engineering or science field and 6–12 years of relevant power-packaging experience.

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