Description
Arm is hiring a Senior Verification Engineer to verify PCIe and CXL subsystem functionality and performance, including IO virtualization, SMMU and interrupt integration, interoperability, and sub-system integration. The role involves creating verification strategies, test plans, SystemVerilog/Verilog/UVM testbenches, debugging failures, improving verification methodologies, collaborating with architecture and design teams, and supporting project management and junior engineers. Candidates need a bachelor’s or master’s degree in a relevant field and more than nine years of experience verifying sophisticated PCIe or CXL subsystems or SoCs, along with expertise in digital hardware, Verilog, UVM, emulation, debugging, formal methodology, and related verification practices. The position offers a salary of $159,400–$215,600 per year and follows Arm’s hybrid working model.
