Description
Arm is hiring a Silicon Timing Closure Engineer to own full chip and block-level timing closure for complex multi-instantiated SoCs. The role handles functional and test-mode timing constraints, resolves timing issues across silicon engineering and EDA vendor teams, generates and implements ECOs, and requires expertise with STA tools, timing corners, multi-power-domain designs, 5nm or 3nm technologies, and automation using Perl, Python, or Tcl. The position offers a salary range of $198,100-$268,000 per year and follows Arm’s hybrid working model.
