Skip to main content

Staff Verification Engineer, Compute Subsystems at Qualcomm International Inc., Mexico Branch Office

Department: ASICS Engineering

Language

Compensation

CA$129,600 – CA$179,600/yr

Setup
On-site
Location
Markham, Ontario
Type
Full-time
Level
senior
Posted

Description

Qualcomm Canada ULC is hiring an ASIC Design Verification Engineer for its AI hardware team. The role develops multimedia and compute subsystem integration verification strategies, creates UVM and System Verilog test environments, develops C reference models, performs RTL and gate-level coverage and simulation, and applies power-aware verification techniques. Candidates need a bachelor's, master's, or PhD in science, engineering, or a related field plus 4–5 years of ASIC design, verification, validation, integration, or related experience, along with strong digital design, UVM, System Verilog, bus protocol, and scripting skills. The listed pay range is $129,600 to $179,600.

For job seekers

Ready to find a role that actually fits?

Upload your résumé, start a Job Search Thread, and let Metaintro rank real openings against your experience — then guide you from search to offer.

Match

Compare live roles against your current evidence.

Position

Turn proof projects into role-specific applications.

Improve

Use market feedback to keep the skill plan current.

Return to navigation