Description
Synopsys is hiring a System Level Test Engineer to own system-level silicon validation of DDR, LPDDR, and HBM memory interface IP in a Nepean lab. The role brings up silicon and reference platforms, characterizes timing and signal-integrity margins, debugs failures using oscilloscopes and protocol analyzers, automates validation pipelines with GitLab, and supports customer system debugging. Candidates need a bachelor’s or master’s degree in electrical or computer engineering, 3–5 years of silicon validation or system-level lab debugging experience, hands-on bring-up experience, DRAM protocol knowledge, instrumentation skills, and scripting ability.
