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System Verification Co-Design Engineer - Speed and Rel at NVIDIA

Department: Engineer, ASIC

Compensation

$136,000 – $264,500/yr

Setup
On-site
Location
California
Type
Full-time
Level
senior
Posted

Description

NVIDIA is hiring a System Verification CoDesign Engineer to co-design system-level speed features, develop verification and automation infrastructure, characterize silicon behavior, and lead debugging of complex silicon and system issues. The role requires an MS in EE, CE, Systems Engineering, or equivalent experience, at least four years of related hardware engineering experience, silicon bring-up and characterization expertise, Python or Perl scripting, and familiarity with AI or LLM-assisted engineering workflows. The position is hybrid and offers a base salary of 136,000–218,500 USD for Level 3 and 168,000–264,500 USD for Level 4, plus equity and benefits.

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