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Technical Lead Manager, Machine Learning, Memory Subsystem Design at Google

Seniority in posting: Advanced

Compensation

$240,000 – $333,000/yr

Location
Sunnyvale, California
Type
Full-time
Level
lead/mgmt
Posted

Description

Google is hiring a Technical Manager for TPU DRAM to lead and mentor RTL design and design verification engineers developing high-performance DRAM and HBM memory subsystems for machine learning products. The role collaborates with cross-functional hardware and software teams, manages third-party IP and DRAM manufacturer relationships, and improves design methodologies and quality controls. Candidates need a relevant bachelor's degree, 15 years of semiconductor design or design verification experience, 6 years of people-management experience, and DRAM subsystem design or verification experience; HBM experience is preferred. The position offers USD 240,000–333,000 plus a 25% bonus target, equity, and benefits.

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