Description
Microchip Technology Inc. is hiring an ASIC I.C. Design Engineer to lead ASIC design implementation from architectural understanding through timing signoff and tapeout. The role covers RTL-to-GDS flow development, timing constraints, DFT, low-power design, technical guidance, documentation, design control, and coordination with project, product-development, ATPG, CAD, and TA teams. Candidates need a bachelor’s or master’s degree in electrical or electronics engineering, 8–12 years of ASIC I.C. design experience, and expertise with Cadence Genus or Synopsys DesignCompiler and Cadence Tempus or Synopsys Primetime. Advanced-node exposure, System-Verilog, and scripting skills are advantageous.
