Description
Microchip Technology Inc. is hiring an FPGA Verification Engineer in Chandler, Arizona to verify next-generation secure, low-power FPGA and SoC products. The role combines constrained random, formal, and C-based verification with reusable UVM test benches, RTL, power-aware, and gate-level verification, and collaboration with emulation, hardware prototyping, architecture, and design teams. The engineer will also contribute to AI/ML-enabled verification, mentor junior team members, and work with global cross-functional teams. The position requires 12+ years of functional verification experience, expertise in System Verilog and UVM, and knowledge of SoC architectures and relevant hardware domains.
