TPU Power Design Engineer at Google

Seniority in posting: Advanced

Compensation

$192,000 – $278,000/yr

Location: Sunnyvale, California
Type: Full-time
Level: senior
Posted: Aug 25, 2026

Description

Google is hiring a TPU Power Design Engineer to improve the power efficiency of Tensor Processing Units. The role covers power modeling, architectural and microarchitectural power optimization, low-power RTL design practices, cross-functional power-management architecture, and leading an experienced power team through complex technical projects. Candidates need a bachelor's degree in a relevant engineering or computer science field and 10 years of design or architecture experience, with additional experience in power design, modeling, architecture, and technical leadership preferred.

Required Skills

Power modeling
Power architecture
RTL design
Power optimization
Technical leadership

Additional Information

Minimum Education: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
Required Previous Experiences: 10 years of experience in design or architecture, including logic design, power architecture, performance, or SoC design
Experience with power design, power modeling, power architecture, or power reduction methodologies and techniques
Preferred Qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science with an emphasis on computer architecture
Experience defining and implementing chip-wide power management architectures and designs
Experience in power modeling, measurement, and correlation across pre- and post-silicon phases
Experience with technical leadership and project ownership with a track record of successful delivery
Understanding of modern power and thermal management techniques at silicon and system levels, including DVFS, turboing, thermal management, and system-level tradeoffs
Ability to solve open-ended power and performance problems under ambiguity