Description
itD is hiring a Verification Engineer to develop and maintain UVM-based verification environments for ASIC/SoC designs, create verification plans and infrastructure, debug design and verification issues, perform timing and gate-level simulations, and support post-silicon bring-up through C-based firmware. The role requires 5–12 years of ASIC or SoC design verification experience, a bachelor's degree in Electrical Engineering or a related field, and is available in Allentown, Pennsylvania or Carlsbad, California. It offers hourly pay of $34.00–$34.20 in Pennsylvania or $41.00–$41.40 in California, medical benefits, a 401(k) plan, paid holidays, and other benefits, and considers only direct W2 candidates.
